Deep Sub Micron 65nm rad hard library (Phase 2)
Programme Reference
T701-313ED
Status
Closed
Country
France
Start Date
2012
End Date
2018
Programme: TDE Prime Contractor: STMICROELECTRONICS SA
Subcontractors:
EADS ASTRIUM LTD • United Kingdom
INTEGRATED SYSTEMS DEVELOPMENT-ISD • Greece
MICROCHIP TECHNOLOGY NANTES • France
THALES ALENIA SPACE FRANCE • France
Objectives
This activity aims to complement and finalise the rad hard 65nm ASIC library design work undertaken in the Phase 1 TRP activity (KIPSAT), and complements the activity T501-301ED of this TRP plan. Two rad hard libraries shall be developed, a Metal Customizable one for low cost applications (pre-diffused) and a Standard Cell one for high performance applications (semi-custom / full-custom).
Description
The library has already been defined in the Phase 1 TRP activity (KIPSAT). The present activity proposes the design, prototyping and testing of Standard Cell and Metal Customizable libraries, representing in total ~ 300 cells. Simulations shall be performed to demonstrate the cells performances and cells radiation hardness. Ageing shall also be taken into account by considering 20 years operational lifetime. The libraries test vehicles shall be manufactured and evaluated according the ECSS test procedures (temperature, radiation). The libraries shall also propose memory generators. A CAD flow and design kit shall be proposed, validated and made available to the end users. Finally the libraries shall be delivered with all the views for timing analysis, synthesis, place route, power analysis. A design kit user guide and library design book shall be delivered to end users.
• Application domain: Generic Technologies
•
Technology Domain:
1 - On-board Data Subsystems
1 - On-board Data Subsystems
•
Competence Domain:
1-EEE Components, Photonics, MEMS
1-EEE Components, Photonics, MEMS
• Initial TRL: TRL 3
• Target TRL: TRL 5
• Achieved TRL: TRL 6
•HarmoRoadMap: N/A
•IPC Document: ESA/IPC(2010)3,ADD.4||ESA/IPC(2011)3,ADD.5
•Public Document: