Nebula Public Library

The knowledge bank of ESA’s R&D programmes

S5 - Next Generation GNSS SoC, SiP and Modules

Programme
GSTP
Programme Reference
GT26-049ES
Prime Contractor
SEPTENTRIO
Start Date
End Date
Status
Closed
Country
Belgium
Objectives
The proposed development will address existing market segments (machine automation, network infrastructure) as well as emerging ones (UAVs, autonomous vehicles). While all these markets segments are growing, there is an increased level of competition and therefore more pressure on price. In this context, the activity intends to continue innovating by introducing new GNSS receiver building blocks targeting the following objectives: improving the level of miniaturization of the GNSS receiver ASIC, with a variant qualified for automotive, integrating a higher level of functionality (differentiating with features like availability, integrity amp; security), and developing new miniaturized modules based on the new chips.
Description
The proposed activity follows the developments of GReCo4 GNSS receiver ASIC (2010-2014) and the Quabanatu (Quad Band Navigation Tuner and Integrated Receiver Module) front end RFIC (2016-2019), performed previously under GSTP Element 2. These technologies equip today all OEM modules and products produced by the company. The GReCo4 ASIC, which hosts the GNSS core engines and CPU, is facing competition from other, and is becoming limited in its ability to process the full set of satellite navigation signals transmitted by all GNSS constellation, in several frequency bands.
The new receiver ASIC to be developed on miniaturized technology will integrate functions from the GReCo4 ASIC, with higher quality signal processing, scaled-up to exploit a maximum number of GNSS signals, and integrating additional resources, for a very powerful System on Chip. This state of the art chip will also be qualified for autonomous driving, which is a strategic market.
 
During the proposed activity, the following four products will be developed:
  • A new baseband System on Chip, replacing the GReCo4 ASIC, designed for improved size, weight, power and cost, by integrating together all digital GNSS functionality (hardware and tracking firmware) in a single chip. Combined with the Quabanatu RFIC, this will result into the next generation chipset product ?Platform S5?
  • A derivative of the new baseband SoC, developed according to the ISO26262 standard and AEC-Q100 compliant, leading to an automotive grade version of ;
Platform S5: ?Platform S5A?
  • A System-in-Package combining the new baseband SoC die, the Quabanatu die and other supporting devices into a single package, resulting into an easy-tointegrated ?single chip? Measurement Engine: ?MOSAIC-me? 
  • A Land Grid Array (LGA) module combining the Measurement Engine with a high performance CPU, leading to an ?Internet-of-Moving-Thing? platform, which will be open to run Positioning Engine evolution (not developed in this project) as well as third parties Positioning Engine / applications: ?MOSAIC-iomt?. ;
Application Domain
Navigation
Technology Domain
23 - Electrical, Electronic and Electro-mechanical (EEE) Components and Quality
Competence Domain
1-EEE Components, Photonics, MEMS
Initial TRL
TRL 4
Target TRL
TRL 7
Achieved TRL
TRL N/A