On-board communication via serial link protocols such as SpaceFibre require Serializer/Deserializer (SERDES) at the physical layer, which connects two units (e.g. payload instrument, mass memory) via copper, backplanes, or optical transceivers with each other.

More and more complex functionalities are implemented in Field Programmable Gate Arrays (FPGA), which are currently procured for a very large part from U.S.A manufacturers. In order to avoid export license, to ensure European non-dependance and to have competitive products, ambitious and coordinated projects - funded by ESA, CNES and EC - have led to the development of the BRAVE family. The current family is composed of three products: ;NG-MEDIUM, NG-LARGE (both in 65nm technology) and the NG-ULTRA (using FD-SOI 28nm technology).