To offer a new ;FPGA product with integrated high precision/resolution ADC and DAC, to provide even more integrated and optimized solutions for control power control or motor control applications.

More and more complex functionalities are implemented in Field Programmable Gate Arrays (FPGA), which are currently procured for a very large part from U.S.A manufacturers. In order to avoid export license, to ensure European non-dependance and to have competitive products, ambitious and coordinated projects - funded by ESA, CNES and EC - have led to the development of the BRAVE family. The current family is composed of three products: ;NG-MEDIUM, NG-LARGE (both in 65nm technology) and the NG-ULTRA (using FD-SOI 28nm technology).

The FD-SOI 28nm presents the advantage of higher integration, higher performance, lower power consumption and requires less effort to adapt it to radiation environments. Thanks to the new possibilities offered by this recent technology and the development carried out in the previous project, it is now possible to answer the needs of control application in terms of radiation, higher integration, performance and power efficiency. ;;In that purpose, it is needed to develop new elements required for the target applications - Digital-to-Analog (DAC) and Analog-to-Digital (ADC) converters - and architect and develop a new chip that integrates these new elements with already existing FPGA architectural elements that have already been developed for the FD-SOI 28nm. ;

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More in detail, this activity includes the definition, design, manufacturing and validation of the new chip. It will start with the definition of the ADCs and DACs specification as well as the consolidation of the product architecture specification that will fulfill the final product requirements (ASIC SRR milestone).

The basic next steps of the activity are: ;;;

- Definition and design of the product, including the ADCs and DACs (ASIC SRR, PDR, DDR and CDR milestones, according to the ECSS-Q-ST-60-02C standard) ;;

- Manufacturing Assembly of prototypes using 28nm FD-SOI technology ;

- Electrical and Functional characterization ;;

- Development Kit definition, design, manufacturing and validation ;

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This activity is complementary to H2020 activity and to CNES/Nanoexplore activity and will focus on a new product, NG-ULTRA150. ;

The prototypes and Development kits produced in this activity will be used for both the NanoXplore internal validation and the end-users evaluation of their final applications. ;

Based on the successful strategy applied to the other BRAVE FPGAs, the evaluation and qualification of the NG-ULTRA150 will be a follow-on activity.