Development of a stand alone chip that is able to shut down the component and holds it powered-down for a preset time. Phase 1 Definition of requirements and scenario of potential usages, Architectural designPhase 2 Detailed Design, Breadboarding, Cost estimation and supplier identification for ASIC/Hybrid solutionPhase 3 ASIC/Hybrid developmentPhase 4 ASIC/HYbrid implementation Qualification

The use of Commercial Off the Shelf (COTS) components is and will always be an option to achieve space system performances that cannot be achieved with available space qualified components. For such components that are not latchup proof by design the use of protection circuitry is essential. In this activity, a highly reliable analogue or mixed signal protection chip shall be designed which provides the following functions:- protection of the COTS target chip from damaging effects of a latchup- possibility for programming (hardwired) maximum currents in a wide range daisy chaining of such chips for protection / concurrent switch-off of multiple supply voltages signalling the occurrence of latchup to a monitoring chip/ processor via a simple interface (interrupt line) automated recovery after a programmable time, or controlled recovery via an enable input connected to a monitoring chip / processor (pin programmable) control of external components for supply currents higher than those that the chip can sustain in standalone mode.The chip shall be developed, prototyped and tested under realistic conditions (radiation, load, latchup) for a range of latchup-capable target chips.