This activity will investigate two different technological approaches for Low Noise Amplifiers (LNAs) operating above 600 GHz, and design, fabricate and test low-noise amplifier MMICs for 660 GHz, using European semiconductor technology

 

Advancements in semiconductor technologies like INP and MHEMT have made low-noise amplifiers (LNA) possible for increasingly higher frequencies. Currently efforts are taken to reach frequencies close to 1 THz. Aggressive reduction of the gate length has been essential in this progress, but is becoming less effective with gate lengths approaching 30 nm scale. New technological approaches are needed to reach thz frequencies. New material systems are being investigated, especially those based on antimonides. Another approach is to improve the charge control with novel device geometries like with Double Gate structures.

Availability of lnas at sub-mm waves above 600 ghz is interesting for future space-borne radiometers for Earth observation for two reasons: Firstly, employment of a low-noise pre-amplifier in front of a Schottky mixer allows improvement in receiver sensitivity. Secondly, lnas make direct-detection radiometers possible, allowing significant simplification of the receiver architecture, as no local oscillator would be needed.

 

The activity starts with technology investigations and process experiments with the aim to demonstrate at transistor level that the performance expected of the final LNA demonstrators is achievable. Initial development with process experiments and measurements on test circuits shall be conducted, including the gathering of modelling data. The subsequent tasks consist of the design, fabrication and initial test of the LNA MMICs using the two technological approaches. Following the testing of the MMICs at chip level, the two LNA Demonstrators will be assembled into waveguide packages and tested.