179 results found Selected 0 items No itemsClear selection Select / deselect all results (all pages, 179 total) Modular General Purpose RTU supporting advanced low speed and medium speed serial busses The SAVOIR/SAG identified the modular RTU as a high priority building block. This is one of the key avionics building blocks as the provided functionality is required by the majority of ESA missions. An EQM has been developed and validated. FR in June/July 2017. EQM Test completed!. The EQM will be used as EM of the Proba3 IEU and it has been used to qualify the design of the IEU of Proba3. EQM campaign concluded and the unit is to be delivered to Proba3. Spain GSTP G521-001ED CRISA SA COMPUTADORAS REDES E INGENIERIA 2012 - 2017 Modular General Purpose RTU supporting advanced low speed and medium speed serial busses Pointing Error Engineering Software Framework The activity will develop a first version of the software framework based on the experience got through a successful prototyping exercise in 2012 called PEET (Pointing Error Engineering Tool). The prototype implements the step-by-step process elaborated in the ESA Pointing Error Engineering Handbook published in 2011 as ESA applicable document ESSB-HB-E-003. Germany GSTP G617-036EC ASTOS SOLUTIONS GMBH 2014 - 2016 Pointing Error Engineering Software Framework File Management Services interface standardisation SAVOIR is an initiative to federate the space avionics community and to work together in order to improve the way that the European Space community builds avionics subsystems. In particular, it is aimed at getting equipment interchangeability. In particular, the group provides a set of standard avionics external and internal interfaces, the definition of building blocks composing the architecture and the functional specification of selected building blocks. One of the building block of the On-Board Reference Architecture is the Solid State Mass Memory. Belgium TDE T702-403SW SPACEBEL SA. 2014 - 2016 File Management Services interface standardisation Model Based Software Development Lifecycle Increasing complexity of Software Systems necessitates the focus on system function and behaviour, abstracting from lower-level implementation details of the programming languages. Modelling languages start to find their way into the development process, from requirements specification and system-software co-engineering, up to operations, through development and verification. Use of models increases the level of specification formality and provides a possibility for model simulation and formal analysis to verify certain aspects of the system from the early lifecycle phases. Spain TDE T702-305SW INDRA SISTEMAS 2013 - 2015 Model Based Software Development Lifecycle Emulators of future NGMP multicore processors Performance of European processors for space applications have been increasing over the years, from the ERC32 (25MHz, current missions) to the single-core Leon2/3 (100MHz, upcoming missions) to the next generation processor (multicore, Leon4, future missions). Simulators are needed throughout the software, spacecraft and operations development. Simulator performance needs to keep the pace with the processors. Instruction set simulators for the ERC32 could keep up with real-time simulation of the overall spacecraft. Portugal TDE T702-304SW GMVIS SKYSOFT S.A. 2014 - 2015 Emulators of future NGMP multicore processors Star tracker on a chip pre-development (Phase 1) The Sensor on a chip activity has shown the feasibility of a 75g, 0.2 watt, 30 arcsecond accuracy fully autonomous star tracker with all functionality implemented on a single chip. Several key unknowns however still exist and can only be verified by test.These include: Optical quality achievable, on chip NVM behavious, radiation behaviour of key functions, noise cross talk and power management. Phase 0 of this predevelopment shall concentrate on demonstrating the optical elements including bonding to the silicon substrate and environmental testing. Italy TDE T705-031EC SELEX SISTEMI INTEGRATI S.P.A. 2011 - 2015 Star tracker on a chip pre-development (Phase 1) Development Environment for Future Leon Multi-core An ESA study is starting considering the system aspects of the use of the multi-core for our applications, and this study will define the final technical solutions. However, the trend seems to be towards the use of a hypervisor. If this is confirmed, there could be a convergence between the various hypervisors used for partitioning, for security and for multi-core. An environment for hypervisor could therefore be reused, which is the focus of the the proposed activity. Belgium TDE T702-302SW SPACEBEL SA. 2013 - 2015 Development Environment for Future Leon Multi-core IMA-SP System design toolkit The Integrated Modular Avionics for Space (IMA-SP) concept introduces the role of System Architect to the spacecraft avionics domain. The System Architect has the key responsibility for negotiating the avionics resource allocation with the hosted application suppliers and then performing a system-level verification to ensure that the configured system is capable to host the applications and meet the system requirements. The allocation of the platform resources is an iterative process between the Architect and the application suppliers. United Kingdom TDE T702-309SW SCISYS UK Ltd 2014 - 2015 IMA-SP System design toolkit Detailed FDI analysis of AOCS mode The activity will focus on two specific modes which are under review for general or legal purposes: safe mode and deorbitation mode.In order to maximize commonality and reuse across all future platforms, a generic safe mode appears an interesting option combining magnetic actuators and the propulsion system. It performs similarly on any orbit with any spacecraft, making the most of the advantages of both technologies. France TDE T705-303EC THALES ALENIA SPACE FRANCE 2013 - 2015 Detailed FDI analysis of AOCS mode SM C Services implementation for a PUS/SOIS based spacecraft This study proposal addresses the issue of compatibility between the CCSDS SMC and SOIS standards and the ECSS PUS standard. Each of these standards bring an added value and represent a useful reference for the definition and implementation of Monitoring and Control (MC) kernels on ground. However, they are unfortunately defined independently from each other and show significant overlaps (especially between SMC and PUS) and/or contradictions. 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