The objective of this activity shall be to investigate very high power amplifiers based on solid state European GaN technology. Unlike the amplifiers available today, GaN technology shall offer the possibility to build such HPA with only one power module at the output.

The NGMP architectural design is currently under way in TRP contract 22279. Early prototypes shall be manufactured by the end of 2010 in commercial Application Specific Integrated Circuit (ASIC) technology (eASIC, UMC, TSMC 90nm). The present activity starts with the functional validation of the early prototypes. With feedback from this validation and from other beta users, the NGMP design will be consolidated, and manufactured as an Engineering Model in the target space technology, the 65nm by STM, which is currently being developed under TRP and FP7 activities.

The SpaceWire codec IP cores offered by ESA's IP core service are widely used many projects. Other important functions of a SpaceWire interface like time counter, configuration port and hardware support for protocols have still to be designed by the user. This work requires still in depth knowledge of the SpaceWire standard which is often not the focus of a scientist developing an instrument. The SpaceWire node interface IP core shall provide an easy access to SpaceWire where all mandatory features are implemented in a standard compliant way.

New architecture/design of the receiver processing chain can contribute in improving the performance. Recent increases in the computational power of computers and digital signal processors have made possible novel signal tracking techniques in GNSS receivers, so that both the Signal processing and the Navigation processing can be optimised or even combined in to one single estimation algorithm.

SAVOIR is an initiative to federate the space avionics community and to work together in order to improve the way that the European Space community builds avionics subsystems. In particular, it is aimed at getting equipment interchangeability. In particular, the group provides a set of standard avionics external and internal interfaces, the definition of building blocks composing the architecture and the functional specification of selected building blocks. One of the building block of the On-Board Reference Architecture is the Solid State Mass Memory.

The availability of mature fibre laser technology in the 1.55 micron spectral region suggests exploring the possibility of adapting this technology to the 1.6 micron spectral region which offers good potential for greenhouse gases measurements from space. This activity aims at exploring the benefits which can be extracted from the fibre laser technology by designing and breadboarding a fibre laser system which fulfils the transmitter requirements of a Differential Absorption LIDAR for CO2 and CH4.

The design of new ablator materials is currently performed by testing in an ad-hoc manner. The components are mixed together in the designed manner, and the material is then tested to find the bulk properties. If the bulk properties do not meet the required specifications, a modified mixture is developed and tested until the requirements are met. This approach leads to a very large effort to develop/modify a material towards a specific (new) mission environment.

Increasing complexity of Software Systems necessitates the focus on system function and behaviour, abstracting from lower-level implementation details of the programming languages. Modelling languages start to find their way into the development process, from requirements specification and system-software co-engineering, up to operations, through development and verification. Use of models increases the level of specification formality and provides a possibility for model simulation and formal analysis to verify certain aspects of the system from the early lifecycle phases.

Performance of European processors for space applications have been increasing over the years, from the ERC32 (25MHz, current missions) to the single-core Leon2/3 (100MHz, upcoming missions) to the next generation processor (multicore, Leon4, future missions). Simulators are needed throughout the software, spacecraft and operations development. Simulator performance needs to keep the pace with the processors. Instruction set simulators for the ERC32 could keep up with real-time simulation of the overall spacecraft.

The Sensor on a chip activity has shown the feasibility of a 75g, 0.2 watt, 30 arcsecond accuracy fully autonomous star tracker with all functionality implemented on a single chip. Several key unknowns however still exist and can only be verified by test.These include: Optical quality achievable, on chip NVM behavious, radiation behaviour of key functions, noise cross talk and power management. Phase 0 of this predevelopment shall concentrate on demonstrating the optical elements including bonding to the silicon substrate and environmental testing.